A low-temperature metal organic chemical vapor deposition (MOCVD) process for the growth of aluminum oxide for gate dielectric applications has been developed. Amorphous films were deposited on 200-mm Si(100) wafers, employing an Al β-diketonate precursor [Al(III) 2,4-pentanedionate] and H2O. Chemical and microstructural properties of films grown in a temperature range of 250-450°C were studied using x-ray photo-electron spectroscopy (XPS), xray diffraction (XRD), Rutherford back-scattering spectrometry (RBS), nuclear reaction analysis (NRA), cross-sectional (X) scanning and transmission electron microscopy (XSEM and XTEM). A design of experiment (DOE) method was used for process mapping and optimization. An optimized process window was defined for the growth of dense, amorphous films with carbon and hydrogen inclusion as low as 1 at. % and 3 at. % respectively. Post-deposition annealing studies indicated that chemical and structural film properties are generally stable up to 650°C. The electrical performance of the films was evaluated by capacitance-voltage (C-V) and currentvoltage (I-V) measurements on metal-oxide-semiconductor (MOS) structures. The dielectric constant (k) obtained was 6.7-9.6 (depending on annealing conditions), with equivalent oxide thickness (EOT) as low as 1.3 nm. Leakage current densities lower than that of equivalent SiO2 films were also achieved.

The effects of the poly-Si annealing on gate oxide charging damage in the gate etching process were investigated. Our electrical test results show that gate oxide charging damage can be reduced if the poly-Si is not annealed prior to the gate etching process.

We comparatively studied the formation of ultra thin Co silicides, Co2Si, CoSi and CoSi2, with/without a Ti-capped and Ti-mediated layer by using rapid thermal annealing in a N2 ambient. Four-point-probe sheet resistance measurements and plan-view electron diffraction were used to characterize the silicides as well as the epitaxial characteristics of CoSi2 with Si. We found that the formation of the Co silicides and their existing duration are strongly influenced by the presence of a Ti-capped and Ti-mediated layer. A Ti-capped layer promotes significantly CoSi formation but suppresses Co2Si, and delays CoSi2, which advantageously increases the silicidation-processing window. A Ti-mediated layer acting as a diffusion barrier to the supply of Co suppresses the formation of both Co2Si and CoSi but energetically favors directly forming CoSi2. Plan-view electron diffraction studies indicated that both a Ti-capped and Ti-mediated layer could be used to form ultra thin epitaxial CoSi2 silicide.

Experimental research of the first composite planar X-ray waveguide-resonator (CPXWR) is presented. Model for an X-ray beam penetration across CPXWR is proposed. The model shows that the experimental data can be interpreted as the effect of the X-ray beam angle tunneling across small gap between two waveguide-resonators aligned consecutive. The assumption been made that the effect may open the key for the mechanism understanding of a hard electromagnetic radiation beam's management. Possibilities of the CPXWR practical using for creation of the X-ray new generation equipment for testing of thin film coating on Si substrates are discussed.

Hydrogen silsesquioxane (HSQ), a low dielectric constant material was deposited by spin coating on Si substrates. The films were cured between 175°C and 575°C. The cured films were subjected to ion-accelerated hydrogen plasma at different DC bias voltage to reduce the dielectric constant (k) of the films. The effect of ion-accelerated hydrogen plasma on cured films was discussed and compared with (i) non-plasma, and (ii) hydrogen plasma without the accelerating DC bias. Capacitance-Voltage measurements (C-V) and Fourier Transform Infrared Spectroscopy (FTIR) studies were done on these films. The C-V measurement shows that k values increase as the curing temperature increases for all the cases. A PECVD system was used for plasma hydrogenation and ion-accelerated plasma hydrogenation. Depending on the curing temperature the dielectric constant values were found to be, (i) between ∼ 3 and 8.8 for nonplasma films, (ii) between ∼3 and 5.1 for plasma hydrogenated films, (iii) between ∼ 2.3 and 2.9 for plasma hydrogenation with ion-acceleration at 100V and between ∼2 and 2.9 for the 150V case. The ion-accelerated plasma treatment results in lower k values as compared to the nonplasma films. FTIR studies showed a reduction in intensity of Si-H peaks with increasing temperature which increases the k value. The hydrogen plasma treatment reduces the k value and the ion-accelerated hydrogen plasma further reduces the k value suggesting further hydrogen incorporation in the films.

We have developed a technique to grow self-aligned epitaxial Cu/MgO films on Si (100) using Pulsed Laser Deposition Method. In this method we deposit a uniform film of Cu/Mg (5-7%) alloy over Si (100) at room temperature using TiN as an intermediate buffer layer. As a result of HRTEM (with spatial resolution of 0.18 nm) and STEM-Z investigations we observed that when this film is annealed at 500°C (in a controlled oxygen environment), in less than 30 minutes time, all the Mg segregates at the top and at the bottom surface of Cu. This is understood to be the consequence of lower surface energy of Mg. At 500°C Mg is quite sensitive to oxygen and thin layer of MgO is immediately formed at the top surface, we also observed a thin layer of MgO at the Cu/TiN interface. Thickness of the upper MgO layer was found to be 15 nm while that of lower layer was 10 nm. MgO underneath layer acts as a diffusion barrier and inhibits the diffusion of Cu in the system. Upper MgO layer acts as a passivating layer and improves the quality of copper against oxidation. Electrical resistivity measurements (in the temperature range 12-300 K) showed MgO/Cu/MgO/TiN/Si (100) sample to be highly conducting. We also observed that the resistivity of the system is insensitive to ambient oxygen environment. Selfaligned MgO (100) layer also provides a means to grow several interesting materials over it. This technique can be used to integrate high temperature superconductors like YBa2Cu3O7 with silicon chip.

Al/PS junctions are non-rectifying and quasi-linear whereas Al/PS/c-Si junctions are weakly rectifying. The rectifying behavior is due to PS/c-Si heterojunction. The diode ideality factor (n) is about 8 for bias ≤0.5 V (about 50 for bias ≤5 V) at forward bias and nearly 1 for ≤0.5 V at reverse bias. As the temperature decreases, n at both forward and reverse biases increases. Different current transport mechanisms are found to be operating across the PS/c-Si junctions under forward and reverse biases. The barrier height measured from I-V data for ≤0.5 V is higher for forward bias than that for reverse bias. For high reverse biases (>5 V), the reverse current increases slowly following In(I)∝ V1/2 law. I-V results on PS/c-Si junctions are explained by a multi tunneling-recombination model for forward bias while carrier generation-recombination and barrier lowering effects for reverse bias.

In the process of chemically etching contact openings, film characteristics of the Borophosphosilicate glass (BPSG) film strongly effect the formation of an ideal contact profile. Ideal contact profiles represent a wine glass shape to provide better metal step coverage into the contact opening in comparison to a vertical sidewall profile. The rounded shape of the wine glass is etched chemically (isotropic) allowing for etch in the vertical and horizontal direction. As the addition of dopants to the oxide film effect the etch rate, the profile of the isotropic etch will change which in turn effects the electrical device properties, down stream processes and device reliability.

BPSG film characteristics are the area of investigation. Characteristics of concern are weight percent concentrations of boron and phosphorus, film density and dopant concentration profiles in relation to depth. To evaluate the entire contact formation module, chemical etch characteristics including etch rate in relation to film depth for thermal oxide films were also investigated. Experimentation in the form of a response surface design was used to model effects of previously discussed BPSG film characteristics.

To achieve the desired and predictable wet etch rate of BPSG in a buffered oxide etch (BOE), calculated control limits were placed on the boron and phosphorus dopant concentrations. Results showed that dopant effects on the isotropic etch process exceeded the control capability of dopant concentrations in the deposition process. In relating process control capabilities to 6σ techniques, a Cpk above 1.5 is considered capable. To eliminate previously discussed defects created in the isotropic etch process, reject limits for dopant concentrations in a BPSG film deposition process would need to be set well within the typical 6σ giving a Cpk below 1.5

HfO2 films have been deposited using anhydrous hafnium nitrate (Hf(NO3)4) as a precursor for atomic layer chemical vapor deposition (ALCVD). These films have been characterized using x-ray diffraction, x-ray reflectivity, atomic force microscopy, current vs. voltage, and capacitance vs. voltage measurements. An advantage of this precursor is that it produces smooth and uniform initiation of film deposition on H-terminated silicon surfaces. As deposited films remained amorphous at temperatures below ∼700°C. The effective dielectric constant of the film (neglecting quantum effects) for films less than ∼15 nm thick, was in the range of kfilm ∼ 10-11, while the HfO2 layer value was estimated to be kHfO2 ∼ 12-14. The lower than expected dielectric constant of the film stack is due in part to the presence of an interfacial layer such as HfSiOx. Excess oxygen may play a role in the lower than expected dielectric constant of the HfO2 layer. Breakdown of HfO2 films occurred at ∼5-7 MV/cm. Leakage current was lower than that of SiO2 films of comparable equivalent thickness.

Electromigration experiments have been carried out on simple Cu dual-damascene interconnect tree structures consisting of straight via-to-via (or contact-to-contact) lines with an extra via in the middle of the line. As with Al-based interconnects, the reliability of a segment in this tree strongly depends on the stress conditions of the connected segment. Beyond this, there are important differences in the results obtained under similar test conditions for Al-based and Cu-based interconnect trees. These differences are thought to be associated with variations in the architectural schemes of the two metallizations. The absence of a conducting electromigrationresistant overlayer in Cu technology, and the possibility of liner rupture at stressed vias lead to significant differences in tree reliabilities in Cu compared to Al.

Thin films of low dielectric constant (κ) materials such as Xerogel (ĸ=1.76) and SilkTM (ĸ=2.65) were implanted with argon, neon, nitrogen, carbon and helium with 2 x 1015 cm -2 and 1 x 1016 cm -2 dose at energies varying from 50 to 150 keV at room temperature. In this work we discuss the improvement of hardness as well as elasticity of low ĸ dielectric materials by ion implantation. Ultrasonic Force Microscopy (UFM) [6] and Nano indentation technique [5] have been used for qualitative and quantitative measurements respectively. The hardness increased with increasing ion energy and dose of implantation. For a given energy and dose, the hardness improvement varied with ion species. Dramatic improvement of hardness is seen for multi-dose implantation. Among all the implanted ion species (Helium, Carbon, Nitrogen, Neon and Argon), Argon implantation resulted in 5x hardness increase in Xerogel films, sacrificing only a slight increase (∼ 15%) in dielectric constant.

Microscopists are faced with many challenges in locating and examining failure sites in the ever-shrinking semiconductor device. The site must be located using electrical characterization techniques like electron beam induced current (EBIC), photo emission microscopy (PEM) or liquid crystal (LC) and then cross-sectioned with a focused ion beam (FIB). Both PEM and LC require the semiconductor circuit to be running near operating conditions which has been observed to locally melt the area of interest, frequently destroying evidence of the failure mechanism. In contrast, EBIC typically can be accomplished at low or no applied voltage eliminating further damage to the circuit. EBIC has been applied to locate leakage sites in high voltage metal oxide semiconductor (MOS) electro static discharge (ESD) reliability failures. In addition to a brief revisit of the basic principles of EBIC and describing a technique to successfully cross section ‘hot spots’ for transmission electron microscopy (TEM) observation, focus will be placed on a case study of the reliability testing failure analysis of ESD power transistors using EBIC, SEM, focused ion beam (FIB), and XTEM.

Zirconium oxide (ZrO2) films were investigated as a potential replacement for silicon dioxide gate dielectric. ZrO2 films were deposited by both atomic layer deposition (ALD) and plasma enhanced ALD (PEALD) techniques using Zr t-butoxide and Zr(NEt2)4 as Zr precursors and oxygen as reactant gas. The XTEM images showed a randomly oriented polycrystalline structure of ZrO2 and amorphous characteristics of the interfacial layer. The calculated dielectric constant value of the ZrO2 films are about 10∼18 and these low values are believed due to the low dielectric constant interface layer. ZrO2 films deposited with oxygen plasma using Zr(NEt2)4 showed the leakage current of 3.12X10-9 A/cm2 at the gate bias voltage of -1.0 Volt with the equivalent oxide thickness value of 1.39 nm. ZrO2 films deposited with the oxygen plasma showed generally improved film quality with relatively low leakage current, small hysteresis and low carbon incorporation as well as the higher growth rate compared to the films deposited with the oxygen gas. Also, ZrO2 films deposited using Zr(NEt2)4 showed relatively improved film properties compared to the films deposited using Zr t-butoxide. This study demonstrated the possible application of PEALD technique for the high quality ZrO2 gate dielectric film deposition.

Hydrido-organo-siloxane-polymer (HOSP), a typical silsesquioxane-based low dielectric constant material, was etched with ions of different incident angles in CHF3 plasma. The etch rate normalized to the rate obtained with ions incident perpendicular to the surface deviated from the general cosine dependence on the ion incident angle. That is, the rate deviated to over-cosine values at low ion angles below 70°, due to the physical sputtering of the surface by energetic ions, and to under-cosine values at high angles, above 70°, due to the redeposition of particles emitted from the bottom. The roughness of the etched surface also varied with the ion incident angle as a result of the surface etching by energetic ions and the redeposition of particles emitted from the bottom. For example, when the bias voltage was –100V, the surface roughness was different according to three angle regions: i) ion bombardment dominant region below 70°, ii) intermediate region between 70° and 85o, and iii) redeposition dominant region above 85°. The surface composition and chemical structure after etching were also affected by the ion incident angle. The F/C atomic in the surface layer was much lower at ion angles higher than 70° than below 70° because cage-like Si-O bonds were more rapidly dissociated by F atoms from fluorocarbon polymer layer than network Si-O bonds at high angles. This information obtained in this study is useful for predicting the profile and surface characteristics of interconnection patterns in microelectronics fabrication.

We have recently developed novel periodic nanoporous silicate glass with high structural stability as low-k thin film by spin-coating method. Periodic porous silicate glass films developed so far cause structural shrinkage (10>∼20% or more) by annealing the spin-coated films. In this investigation we adopt vapor-phase TEOS (tetraethoxysilane)-treatment before anneal. Our novel nanoporous film shows little shift of XRD peak position after annealed at 673K, indicating both the ultimate mechanical strength and the minimization of stress in the interface between the prepared film and the underlying substrate. Such a shrinkage-free periodic nanoporous silica film can possess higher VBD (break down voltage) and lower ILeak (leakage current). In this article we estimate structural properties (including information on pores introduced intentionally) by XRD and TEM observation, and electrical properties (dielectric constant, VBD and ILeak) by IV and CV measurement of this special-treated periodic nanoporous silica film. The dielectric constant of the thus prepared periodic porous silica film with silylation after calcination was evaluated to be around 1.8 at 100kHz.

Electromigration (EM) lifetime characteristics and failure mechanism were investigated for Cu/porous-low-k interconnects and compared to Cu/oxide. The porous low-k dielectric was JSR LKD-5109TM, an MSQ-based spin-on organosilicate material with k = 2.2. The activation energies for EM failure were found to be 0.9 - 1.0 eV for the porous MSQ and 0.8 eV for oxide while the current density exponents for both materials were found to be similar, 1.2 - 1.3. This range of activation energies are commonly associated with mass transport at the Cu/cap-layer interface and suggest a similar mass transport mechanism; interfacial diffusion. Porous MSQ structures showed the same distinct failure morphology as observed in other Cu/low-k interconnects: voiding at the cathode and lateral Cu extrusion at the anode under the cap layer, which seems to be related to the thermo-mechanical properties of Cu/low-k interconnects. The shorter lifetime characteristics of Cu/low-k interconnects comparing to Cu/oxide can be attributed to a smaller back stress, due to less thermomechanical confinement. Results of this study indicate that thermo-mechanical properties of low-k interconnects are important parameters in controlling EM reliability of Cu/low-k interconnects.

HfO2 as a dielectric material in MOS capacitor by direct sputtering of Hf in an O2 ambient onto a Si substrate was studied. The results showed that the interface layer formed between HfO2 and the Si substrate was affected by the RTA time in the 500°C annealing temperature. Since the interface layer is mainly composed of hafnium silicate, and has high interface trap density, the effective barrier height is therefore lowered with increased RTA time. The change in the effective barrier height will affect the FN tunneling current and the operation of the MOS devices when it is applied for nonvolatile memory devices.

Micro-Raman spectroscopic technique was used to investigate vibrational properties of NiSi thin films formed on three different (100) Si substrates: non-implanted, 20-keV BF2+-implanted, and 20-keV B+-implanted. Raman spectroscopy was also performed on NiSi powder to identify various phonon modes associated with different selection rules of group theory. It was found that Raman peaks of NiSi thin films formed on BF2 + implanted substrate were broader and shifted to lower frequency side compared to films formed on other substrates. The broadening of the Raman peaks in these films, which also exhibit much improved thermal stability, is attributed to small grains resulting probably from fluorine segregation to grain boundaries and interface. It is further proposed that besides grain boundary segregation, the excess fluorine in the film influences the stress-state in the silicide film resulting in shift of phonon peak positions.

A novel silicon cleaning process using strontium metal thin films has been described. The silicon dioxide de-oxidation process using strontium as catalysts has been studied by X-ray Photoelectron Spectroscopy (XPS) and other in-situ techniques. A Sr/Si template for the epitaxial growth of SrTiO3 single crystals on silicon can be directly formed as a result of the above Sr-de-oxidation process. The de-oxidation mechanism can be explained after solving the interfacial structures of the Sr/SiO2/Si system with in-situ XPS.

Trace metal contamination during wet cleaning processes on silicon wafer surfaces is a detrimental effect that impairs device performance and yield. Determining the chemical state of deposited impurities helps in understanding how silicon surfaces interact with chemical species in cleaning solutions. However, since impurity concentrations of interest to the semiconductor industry are so low, conventional techniques such as x-ray photoelectron spectroscopy cannot be applied. Nonetheless, chemical information on trace levels of contaminants can be determined with x-ray absorption near edge spectroscopy (XANES) in a grazing incidence geometry. In this study, silicon samples were dipped in ultra pure water (UPW) and 2% hydrofluoric (HF) solutions with copper concentrations of 5 and 1000 ppb, respectively. These samples were then analyzed using XANES in fluorescence yield mode to determine the oxidation state of deposited copper contaminants. It was found that copper impurities on the silicon surface from HF solution were metal in character while copper impurities deposited from the spiked UPW solution were deposited as an oxide. These results show that XANES can provide information on the chemical state of trace impurities even at surface concentrations below a few thousandths of a monolayer.