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Published online by Cambridge University Press: 28 February 2011
There is a rapid growth of interest in the application of amorphous silicon alloy thin film devices to large area microelectronic circuits. Increased current levels are a constant goal since gains in device current result in proportional gains in power and speed. Mobility limitations in amorphous silicon thin film transistors have directed interest toward short conduction channel devices to achieve higher current levels; furthermore, compatibility with large area processing makes photolithography with 10μm feature size very attractive. Consequently, innovative techniques, which define channel lengths by processing parameters rather than by mask feature size are necessary. Previous work has applied such techniques to vertical structure TFT's which define channel lengths by the vertical height of deposited layers. Here, we report on a technique which achieves short channel lengths in planar structures using etching parameters to define short channel lengths. Amorphous silicon alloy TFTs have been fabricated with channel lengths of ≈2μm which reach currents of lma. These techniques broaden the range of application of amorphous silicon alloy TFTs by providing devices capable of operating at higher currents and higher speeds.