Hostname: page-component-54dcc4c588-2ptsp Total loading time: 0 Render date: 2025-09-21T23:23:53.636Z Has data issue: false hasContentIssue false
  • English
  • Français

Polymeric Materials Requirements for the GE High-Density Interconnect Process

Published online by Cambridge University Press:  15 February 2011

H.S. Cole ,
B. Gorowitz ,
T. Gorczyca ,
R. Wojnarowski  and
J. Lupinski
H.S. Cole
Affiliation:
General Electric Company, Research and Development, P.O. Box 8, Schenectady, N.Y. 12301
B. Gorowitz
Affiliation:
General Electric Company, Research and Development, P.O. Box 8, Schenectady, N.Y. 12301
T. Gorczyca
Affiliation:
General Electric Company, Research and Development, P.O. Box 8, Schenectady, N.Y. 12301
R. Wojnarowski
Affiliation:
General Electric Company, Research and Development, P.O. Box 8, Schenectady, N.Y. 12301
J. Lupinski
Affiliation:
General Electric Company, Research and Development, P.O. Box 8, Schenectady, N.Y. 12301
Get access

Abstract

In the GE High-Density Interconnect Process, thermoplastic polyetherimide adhesives with selectively variable glass transition temperatures (Tg's) are used as chip attach and overlay adhesive. Alternating layers of patterned metal and dielectric are then applied to fabricate the interconnect structure. Upper layer dielectrics are formed using a modified siloxane-polyimide that can be processed at temperatures below 200 °C. The unique materials requirements and materials development issues associated with this approach are discussed.

Information

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 264: Symposium G – Electronic Packaging Materials Science VI , 1992 , 43
Copyright
Copyright © Materials Research Society 1992

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

Article purchase

Temporarily unavailable

References

[1] Eichelberger, C.W., Wojnarowski, R.J., Carlson, R.O., L.M.. Levinson, SPIE Symp. on Innovative Sci. and Technol., Symp. Proceedings, p. 877, Jan. 1988 Google Scholar
[2] Carlson, R.O., Eichelberger, C.W., Wojnarowski, R.J., and Levinson, L.M., IEPS, Conf. Proceedings, p. 793, Nov. 1988 Google Scholar
[3] Levinson, L.M., Eichelberger, C.W., Wojnarowski, R.J., Carlson, R.O., and Kohl, J., GOMAC, Conf. Proceedings, p. 445, Nov. 1988 Google Scholar
[4] Adler, M.S., SPIE International Symp. on Advances in Interconnects and Packaging, Conf Proceedings, Nov. 1990 Google Scholar
[5] Mastroianni, S.T., Solid State Technol., Vol.27, p. 155, May 1984 Google Scholar
[6] Townsend, P.H., Bordeaux, D.C., Hahn, S.F., Thomson, M., McGee, R., Carr, J.N., Johnson, R.W., and Weidner, K., ISHM ‘89 Proceedings, Baltimore, Md., p. 447, 1989 Google Scholar
[7] Bright, J.P. and Going, T.J., Insulation/Circuits, p. 103, Oct. 1982 Google Scholar