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A Novel Silicided Shallow Junction Technology for Cmos VLSI

Published online by Cambridge University Press:  28 February 2011

D.L. Kwong ,
Y.H. Ku ,
S.K. Lee ,
N.S. Alvi ,
P. Chu ,
Y. Zhou  and
J.M. White
D.L. Kwong
Affiliation:
Microelectronics Research Center, Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX 78712
Y.H. Ku
Affiliation:
Microelectronics Research Center, Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX 78712
S.K. Lee
Affiliation:
Microelectronics Research Center, Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX 78712
N.S. Alvi
Affiliation:
Delco Electronics, GMC, Kokomo, IN 46902
P. Chu
Affiliation:
Charles Evans Associates, Redwood city, CA 94063
Y. Zhou
Affiliation:
Dep.of Chemistry, University of Texas at Austin, Austin, TX 78712
J.M. White
Affiliation:
Dep.of Chemistry, University of Texas at Austin, Austin, TX 78712
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Abstract

A novel technique for the fabrication of shallow, silicided p+-n junctions with excellent electrical characteristics has been developed. The technique utilizes the ion implantation of dopants into silicide layers formed by ion-beam mixing with Si ions and low temperature annealing, and the subsequent drive-in of implanted dopants into the Si substrates to form shallow junctions. This technique can be easily applied to the fabrication of MOSFETs in a self-aligned fashion, and can have a significant impact on CMOS VLSI technology.

Type
Articles
Information
MRS Online Proceedings Library (OPL) , Volume 71: Symposium F – Materials Issues in Silicon Integrated Circuit Processing , 1986 , 379
Copyright
Copyright © Materials Research Society 1986

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References

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