Hostname: page-component-745bb68f8f-cphqk Total loading time: 0 Render date: 2025-01-28T23:26:32.811Z Has data issue: false hasContentIssue false
  • English
  • Français

Integrated Vapor Phase Cleaning and Pure no Nitridation for Gate Stack Formation

Published online by Cambridge University Press:  10 February 2011

F. Glowacki ,
B. Froeschle ,
L. Deutschmann ,
I. Sagnes ,
D. Laviale ,
D. Bensahel ,
A. Halimaoui ,
F. Martin  and
A. J. Bauer
F. Glowacki
Affiliation:
STEAG-AST elektronik GmbH, Daimlerstrasse 10, D-89160 Dornstadt, Germany
B. Froeschle
Affiliation:
STEAG-AST elektronik GmbH, Daimlerstrasse 10, D-89160 Dornstadt, Germany
L. Deutschmann
Affiliation:
STEAG-AST elektronik GmbH, Daimlerstrasse 10, D-89160 Dornstadt, Germany
I. Sagnes
Affiliation:
France Telecom - CNET, BP 98, 38243 Meylan Cedex, France
D. Laviale
Affiliation:
France Telecom - CNET, BP 98, 38243 Meylan Cedex, France
D. Bensahel
Affiliation:
France Telecom - CNET, BP 98, 38243 Meylan Cedex, France
A. Halimaoui
Affiliation:
France Telecom - CNET, BP 98, 38243 Meylan Cedex, France
F. Martin
Affiliation:
LETI-DMEL, CENG, av. des Martyrs, BP 85 X, 38041 Grenoble cedex, France
A. J. Bauer
Affiliation:
Fraunhofer Institut fuer integrierte Schaltungen, Schottkystrasse 10, D-91058 Erlangen, Germany
Get access

Abstract

The purpose of this publication is to give an insight into process development performed in two modules which belong to a cluster tool designed for the gate stack process sequence of cleaning, gate oxidation, and polysilicon chemical vapor deposition. For the first time, following the hardware and software MESC-based standards, two suppliers have integrated complementary modules to build a cluster tool. This equipment answers the demands of the 1C Manufacturers and follows the “best of breed” approach. Four single wafer rapid thermal process chambers, a Vapor Phase Cleaning (VPC) and a Rapid Thermal Oxidation/Nitridation (RTO/N) module from STEAG-AST Elektronik, a polysilicon and a nitride chemical vapor deposition module from ASM International are currently connected together to prove the feasibility of the single wafer processing gate stack cluster tool.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 470: Symposium F – Rapid Thermal and Integrated Processing IV , 1997 , 229
Copyright
Copyright © Materials Research Society 1997

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

1. Werkhoven, C., Verhaar, N., Bergman, T. and Deutschmann, L., in 4th Int. Conf. on Advanced Thermal Processing of Semiconductors (RTP'96, Boise), p. 443–46.Google Scholar
2. Deutschmann, L., Glowacki, F., Knarr, T., Verhaar, N. and Werkhoven, C., in 4th Int. Conf. on Advanced Thermal Processing of Semiconductors (RTP'96, Boise), p. 71–77.Google Scholar
3. Pfitzner, L., Schneider, C., Ryssel, H., Werkhoven, C., Deutschmann, L: and Spindler, O., in the Fifth International Symposium on Semiconductor Manufacturing, p. 54 (1996).Google Scholar
4. Walk, H., German Patent DE 4012615 (24 October 1991).Google Scholar
5. Deal, B. E., McNeilly, M. A., Kao, D. B., deLarios, J.M., Solid State Technol. July 1990. 73.Google Scholar
6. Froeschle, B., Deutschmann, L., Kasko, I., Oechsner, R. and Schneider, C., to be published in Rapid Thermal and Integrated Processing VI. (Mat. Res. Soc. Symp., San Fransisco, 1997).Google Scholar
7. Kaneko, T., Suemitsu, M. and Miyamoto, N., Jap. J. Appl. Phys. 28, 2425 (1989).Google Scholar
8. Boyd, I. W., Cracium, V. and Kazor, A., Jpn. J. Appl. Phys. 32, 6141 (1993).Google Scholar
9. Sagnes, I., Laviale, D., Glowacki, F., Blanchard, B. and Martin, F., in Rapid Thermal and Integrated Processing IV. edited by Brueck, S., Gelpey, J., Kermani, A., Regolini, J. and Sturm, J. (Mat. Res. Soc. Symp. Proc. 387, San Francisco, Ca, 1995), pp. 253–258.Google Scholar
10. Okada, Y., Tobin, P. J., Hegde, R. I., Liao, J. and Rushbrook, P., Appl. Phys. Lett. 61 (26), 3163 (1992).Google Scholar
11. Walk, H., Deutschmann, L., Martin, F., Masurel, C. and Bauer, A., in Rapid Thermal and Integrated Processing III, edited by Wortman, J., Gelpey, J.C., Green, M., Brueck, S. and Roozeboom, F. (Mat. Res. Soc. Symp. Proc. 342, San Francisco, Ca, 1994), pp. 175–180.Google Scholar
12. Martin, F., Masurel, C., Bensahel, D., Sagnes, I., Tartavel, G., Blanchard, B. and Deutschmann, L., extended abstract of the sixth ESPRIT Workshop on characterisation and growth of thin dielectrics in microelectronics (Cork, November 1994).Google Scholar
13. Tobin, P. J., Okada, Y., Lakhotia, V., Ajuria, S. A., Feil, W. A. and Hedge, R. I., J. Appl. Phys. 75, 1811(1994).Google Scholar
14. Bhat, M., Kim, J., Yan, J., Yoon, G. W., Han, L. K. and Kwong, D. L., IEEE Electron Device Letters 15, no 10, 421 (1994).Google Scholar
15. Sagnes, I., Laviale, D., Regache, M., Glowacki, F., Deutschmann, L., Blanchard, B. and Martin, F., in in Rapid Thermal and Integrated Processing V. edited by Gelpey, J.C., Öztürk, M.C., Thakur, R.P.S., Fiory, A.T. and Roozeboom, F. (Mat. Res. Soc. Symp. Proc. 429, San Francisco, Ca, 1996), pp. 251–256.Google Scholar
16. Grant, J. M., in Rapid Thermal and Integrated Processing IV. edited by Brueck, S., Gelpey, J., Kermani, A., Regolini, J. and Sturm, J. (Mat. Res. Soc. Symp. Proc. 387, San Francisco, Ca, 1995), pp. 313–318.Google Scholar
17. Sagnes, I., Laviale, D., Martin, F., Glowacki, F. and Deutschmann, L., in the Transient Thermal Processing Techniques in Electronic Materials. (TMS, Anaheim, California, 1996), pp. 49–53.Google Scholar