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Integrated Amorphous and Polycrystalline Silicon TFTs with a Single Silicon Layer

Published online by Cambridge University Press:  15 February 2011

K. Pangal ,
Y. Chen ,
J.C. Sturm  and
S. Wagner
K. Pangal
Affiliation:
Dept. of Electrical Engineering, Princeton University, Princeton, NJ 08544
Y. Chen
Affiliation:
Dept. of Electrical Engineering, Princeton University, Princeton, NJ 08544
J.C. Sturm
Affiliation:
Dept. of Electrical Engineering, Princeton University, Princeton, NJ 08544
S. Wagner
Affiliation:
Dept. of Electrical Engineering, Princeton University, Princeton, NJ 08544
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Abstract

Selective exposure of an a-Si:H film to a room temperature hydrogen plasma using a patterned SiNx, capping layer and a subsequent anneal at 600°C, resulted in polycrystalline and amorphous silicon regions in a single silicon layer on the same glass substrate. Top-gate non-self-aligned TFTs were fabricated in both the amorphous and polycrystalline regions with all shared processing steps and no laser processing using a re-hydrogenation step. The TFTs had good characteristics, with field-effect mobilities upto 1.2 cm2/Vs and 15 cm2/Vs for the a-Si:H and the poly-Si TFTs, respectively, and ON/OFF ratios >105 in either case.

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