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Improved Methods for Evaluation of Rapid Thermal Processors

Published online by Cambridge University Press:  10 February 2011

Tony Speranza ,
Jim Nakos ,
Val Medina ,
Sanjay Banerjee ,
Gary Williamson ,
Pat Lysaght  and
Don Lindholm
Tony Speranza
Affiliation:
Motorola Austin, TX
Jim Nakos
Affiliation:
Motorola Austin, TX
Val Medina
Affiliation:
University of Texas at Austin, SEMATECH Austin, TX
Sanjay Banerjee
Affiliation:
University of Texas at Austin, SEMATECH Austin, TX
Gary Williamson
Affiliation:
IBM Burlington, VT
Pat Lysaght
Affiliation:
IBM Burlington, VT
Don Lindholm
Affiliation:
IBM Burlington, VT
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Abstract

SEMATECH has worked with numerous commercial suppliers of RTP systems on both evaluation and development projects. It has adopted standardized methods which minimize monitor wafer impact and improve system characterization. RTP temperature control requirements are projected to tighten with each successive technology node (1). This paper discusses issues concerning performance evaluation of Rapid Thermal Processors (RTP).

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 470: Symposium F – Rapid Thermal and Integrated Processing IV , 1997 , 63
Copyright
Copyright © Materials Research Society 1997

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References

REFERENCES

(1) National Technology Roadmap for Semiconductors, SIA Semiconductor Association, 1994.Google Scholar
(2) Hebb, Jeffery, Jensen, Klavs, Multi-Rad: PC Based S/W for Multilayer Film Calculation, SEMATECH Technology Transfer # 97033264-TR, Austin, TX: SEMATECH to publish April 30, 1994.Google Scholar