Nanocrystalline silicon is a candidate material for fabricating thin film transistors with high carrier mobilities on plastic substrates. A major issue in the processing of nanocrystalline silicon thin film transistors (nc-Si:H TFTs) at ultralow temperatures is the quality of the SiO2 gate dielectric. SiO2 deposited at less than 250°C by radio frequency plasma enhanced chemical vapor deposition (rf-PECVD), and not annealed at high temperature after deposition, exhibits high leakage current and voltage shifts when incorporated into TFT's. Secondary ion mass spectrometry (SIMS) measurements show that the hydrogen concentration (NH) in PECVD oxide deposited at 150°C on crystalline silicon (x-Si) is ∼ 0.8 at. %. This is much higher than in thermal oxides on x-Si, which display concentrations of less than 0.003 at. %. The leakage current density for thermal oxides on x-Si at a bias of 10 V is ∼9×10−6 A/cm2 whereas for 200°C PECVD oxides on nc-Si:H the current is ∼1×10−4 A/cm2. As the temperature of the SiO2 deposition is reduced to 150°C the current density rises by up to two orders of magnitude more. The H which is suspected to cause the leakage current across the PECVD oxide originates from the nc-Si:H substrate and the SiH4 source gas. We analyzed the 300-nm gate oxide in capacitor structures of Al / SiO2 /n+ nc-Si:H / Cr / glass, Al / SiO2 / n+ nc-Si:H / x-Si, and Al / SiO2 / x-Si. Vacuum annealing the nc-Si:H prior to PECVD of the oxide drives H out of the nc-Si:H film and reduces the amount of H incorporated into the oxide that is deposited on top. SiO2 film deposition from SiH4 and N2O at high He dilution has a still greater effect on lowering NH. The leakage current at a 10 V bias dropped from ∼1×10−4 A/cm2 to about ∼2×10−6 A/cm2 using He dilution at 250°C, and the vacuum anneal of the nc-Si:H lowered it by an additional factor of two. Thus we observe that both the nc-Si:H anneal and the SiO2 deposition at high He dilution lessen the gate leakage current.