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Published online by Cambridge University Press: 28 February 2011
Different in-plane mismatch was introduced by varying the Ga 0.92In0.08As(p+) epilayer thickness (h-0.1, 0.25, 0.5 and lum) on GaAs(n)/GaAs(n+) structure. For sample with h-lum, quasi-Fermi level pinning effect was observed in low temperature forward Current-Voltage characteristic due to high density misfit dislocation. From Vint measurement at low frequency limit in C-2 vs Voltage plot, interface state density Nss was obtained. From Capacitance-Voltage measurements at different frequencies, single-level interface state density Ns was estimated using Schokley-Read-Hall statistics. Both Nss and Ns show their linear relation with epilayer in-plane mismatch. Admittance Spectroscopy shows an interface trap level at about Ev + 0.36 eV with the hole capture cross section cp = 2.7×10-15 cm-2 for the h-lum sample, and at Ev + 0.21 eV with cP = 2.4×10-16 cm-2 for the h-0.5um sample.