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GaAs Heteroepitaxy on Substrate-Engineered Silicon Using SixGe1–x Multilayer Structures

Published online by Cambridge University Press:  28 February 2011

J.B. Posthill ,
R. Venkatasubramanian ,
D.P. Malta ,
S.V. Hattangady ,
G.G. Fountain ,
M.L. Timmons  and
R.J. Markunas
J.B. Posthill
Affiliation:
Research Triangle Institute, Research Triangle Park, North Carolina. 27709-2194
R. Venkatasubramanian
Affiliation:
Research Triangle Institute, Research Triangle Park, North Carolina. 27709-2194
D.P. Malta
Affiliation:
Research Triangle Institute, Research Triangle Park, North Carolina. 27709-2194
S.V. Hattangady
Affiliation:
Research Triangle Institute, Research Triangle Park, North Carolina. 27709-2194
G.G. Fountain
Affiliation:
Research Triangle Institute, Research Triangle Park, North Carolina. 27709-2194
M.L. Timmons
Affiliation:
Research Triangle Institute, Research Triangle Park, North Carolina. 27709-2194
R.J. Markunas
Affiliation:
Research Triangle Institute, Research Triangle Park, North Carolina. 27709-2194
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Abstract

The novel concept of using a SixGe1–x multilayer structure as a buffer layer between a silicon substrate and a GaAs epitaxial layer to accommodate the GaAs/Si 4.1% lattice mismatch is introduced. Initial results using a 340 nm trilayer SixGe1–x multilayer structure are presented and are critically assessed. Significant potential is demonstrated, and the work to date indicates that certain guidelines and procedures must be adhered to for this method of threading dislocation reduction to be effective.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 198: Symposium V – Epitaxial Heterostructures , 1990 , 219
Copyright
Copyright © Materials Research Society 1990

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References

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