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Electrical Stability of a-Si:H TFTs Fabricated at 150°C

Published online by Cambridge University Press:  17 March 2011

H. Gleskova  and
S. Wagner
H. Gleskova
Affiliation:
Princeton University, Department of Electrical Engineering, Princeton, NJ 08544
S. Wagner
Affiliation:
Princeton University, Department of Electrical Engineering, Princeton, NJ 08544
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Abstract

We investigated the electrical stability of amorphous silicon thin-film transistors (a-Si:H TFTs) fabricated on 51 μm thick polyimide foil at 150°C. Gate dc-voltage bias stressing caused an increase in threshold voltage and subthreshold slope, and a minor decrease in mobility. Annealing in H2+N2 substantially improved the stability of the TFTs. In annealed TFTs the threshold voltage shift exhibited a power law dependence on time with the exponent γ depending on gate bias Vg. For Vg = 20 V, γ = 0.45, while for Vg = 80 V, γ = 0.27. The threshold voltage shift also exhibited a power law dependence on Vg with the exponent β depending slightly on stress duration. β = 2.1 for t = 100 sec and 1.7 for t = 5000 sec. These values fall into the range experimentally observed for a-Si:H TFTs fabricated at the standard temperatures of 250-350°C.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 664: Symposium A – Amorphous and Heterogeneous Silicon-Based Films-2001 , 2001 , A19.7
Copyright
Copyright © Materials Research Society 2001

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