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Electrical Characterization of Al2O3 - SiO2 Mos Structures

Published online by Cambridge University Press:  10 February 2011

L-Å Ragnarsson ,
E. Aderstedt  and
P. Lundgren
L-Å Ragnarsson
Affiliation:
Microtechnology Centre at Chalmers and Solid State Electronics Laboratory, Department of Microelectronics, Chalmers University of Technology, SE-412 96 Göteborg, SWEDEN E-mail: loke@ic.chalmers.se
E. Aderstedt
Affiliation:
Microtechnology Centre at Chalmers and Solid State Electronics Laboratory, Department of Microelectronics, Chalmers University of Technology, SE-412 96 Göteborg, SWEDEN E-mail: loke@ic.chalmers.se
P. Lundgren
Affiliation:
Microtechnology Centre at Chalmers and Solid State Electronics Laboratory, Department of Microelectronics, Chalmers University of Technology, SE-412 96 Göteborg, SWEDEN E-mail: loke@ic.chalmers.se
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Abstract

A comparative capacitance voltage method is used to investigate the equivalent thickness reduction during post metallization annealing of thermally grown ultrathin (∼15-27 Å) oxides. It is found that a double layered dielectric consisting of a thin Al2O3—SiO2 sandwich is appropriate to describe both the increased capacitance and the nearly unaltered current after anneal. It is further shown that the impact of initial thickness and method of growth — in a conventional furnace or by rapid thermal oxidation — on the equivalent thickness reduction is negligible.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 567: Symposium R – Ultrathin SiO2 and Higg-K Materials for ULSI Gate Dielectrics , 1999 , 451
Copyright
Copyright © Materials Research Society 1999

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References

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