Published online by Cambridge University Press: 22 February 2011
Because of the continuing miniaturization, electromigration (EM) phenomena are still a key issue in reliability of VLSI metallizations. The present study of EM induced voiding and hillocking was performed on unpassivated conductor lines with various widths and current densities. Stressed and unstressed interconnects were carefully examined with SEM and TEM techniques, especially with regard to void densities, void sizes and characteristic lengths between void and hillock. The fatal void shape was related to current density and line width indicating that the failure mechanism changes with decreasing line width and decreasing current density.