Published online by Cambridge University Press: 30 July 2012
This work presents a study on the activation behavior of high-dose (φ > 1015 cm-2) boron and phosphorus implants for low resistance source and drain regions for thin-film transistors (TFTs) fabricated using solid-phase crystallization (SPC) of amorphous silicon. Process variables include factors associated with ion implant and annealing conditions, as well as the SPC and implant process arrangement. Four-point probe sheet resistance (Rs) measurements were used as a comprehensive assessment of the electrical properties. Results have identified similarities and differences in activation behavior that can influence process integration strategies considering both the SPC approach and TFT fabrication.