Hostname: page-component-5b777bbd6c-sbgtn Total loading time: 0 Render date: 2025-06-19T09:33:38.556Z Has data issue: false hasContentIssue false
  • English
  • Français

Dislocation Formation in Trench-Based Dynamic Random Access Memory (DRAM) Chips

Published online by Cambridge University Press:  15 February 2011

H. Ho ,
E. Hammerl ,
R. Stengl  and
J. Benedict
H. Ho
Affiliation:
IBM East Fishkill, Advanced Semiconductor Research and Development Center
E. Hammerl
Affiliation:
Siemens at IBM East Fishkill, Advanced Semiconductor Research and Development Center
R. Stengl
Affiliation:
Siemens at IBM East Fishkill, Advanced Semiconductor Research and Development Center
J. Benedict
Affiliation:
IBM East Fishkill, Advanced Semiconductor Research and Development Center
Get access

Abstract

This paper reports on our studies of dislocation formation in trench capacitor DRAM structures. Experimental results on process dependence and layout dependence of dislocation formation in cell layouts with minimum feature sizes from 0.5 μm to 0.25 μm are compared to two-dimensional stress simulations. It is shown that the nucleation and spatial distribution of dislocations can be explained by considering stress fields which are influenced by the overlay of deep trench and shallow trench isolation structures.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 405: Symposium K – Surface/Interface and Stress Effects in Electronic Materials Nanostructures , 1995 , 459
Copyright
Copyright © Materials Research Society 1996

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

Article purchase

Temporarily unavailable

References

1) Nesbit, L., Alsmeier, J., Chen, B., DeBrosse, J., Fahey, P., Gall, M., Gambino, J., Gernhardt, S., Ishiuchi, H., Kleinhenz, R., Mandelman, J., Mii, T., Morikado, M., Nitayama, A., Parke, S., Wong, H., Bronner, G., 1993 IEDM Technical Digest, p. 627.Google Scholar
2) Bronner, G., Aochi, H., Gall, M., Gambino, J., Gernhardt, S., Hammerl, E., Ho, H., Iba, J., Ishiuchi, H., Jaso, M., Kleinhenz, R., Mii, T., Narita, M., Nesbit, L., Neumueller, W., Nitiyama, A., Ohiwa, T., Parke, S., Ryan, J., Sato, T., Takato, H., Yoshikawa, S., 1995 VLSI Sympsoium Digest, p. 15.Google Scholar
3) Stiffler, S., Lasky, J. B., Koburger, C. W., Berry, W. S., IEEE Trans. Elec. Dev 37, 1253 (1990).Google Scholar