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Development of Spice Models for Amorphous Silicon Thin-Film Transistors

Published online by Cambridge University Press:  25 February 2011

M. Hack ,
J. G. Shaw  and
M. Shur
M. Hack
Affiliation:
Xerox Palo Alto Research Center, 3333 Coyote Hill Road, Palo Alto, CA 94304
J. G. Shaw
Affiliation:
Xerox Palo Alto Research Center, 3333 Coyote Hill Road, Palo Alto, CA 94304
M. Shur
Affiliation:
Dept. of Electrical Engineering, University of Minnesota, Minneapolis, MN 55455
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Abstract

In this paper we describe a new analytic model for both the current-voltage and capacitance-voltage characteristics of amorphous-silicon thin-film transistors. This analytic model has been incorporated into a circuit simulation program (SPICE) to provide an accurate comprehensive three terminal model for amorphous-silicon thin-film transistors. We present results showing good agreement between circuit simulations based on this new device model and experimental data. The development of amorphous silicon SPICE simulation tools increases the design accuracy of advanced analog and digital circuits.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 149: Symposium E – Amorphous Silicon Technology - 1989 , 1989 , 233
Copyright
Copyright © Materials Research Society 1989

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References

REFERENCES

1) Tuinenga, P.W., SPICE: A guide to Circuit Simulation and Analysis using PSPICE, Prentice Hall, New Jersey (1988)Google Scholar
2) Hack, M., Shaw, J.G., and Shur, M., Mat. Res. Soc. Symp. Proc., vol.118 p. 207 (1988)CrossRefGoogle Scholar
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