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Applications of three-dimensional LSI

Published online by Cambridge University Press:  10 March 2015

Mitsumasa Koyanagi ,
Takafumi Fukushima ,
Kang-Wook Lee  and
Tetsu Tanaka
Mitsumasa Koyanagi
Affiliation:
Tohoku University, Japan; koyanagi@bmi.niche.tohoku.ac.jp
Takafumi Fukushima
Affiliation:
New Industry Creation Hatchery Center, Tohoku University, Japan; fukushima@bmi.niche.tohoku.ac.jp
Kang-Wook Lee
Affiliation:
New Industry Creation Hatchery Center, Tohoku University, Japan; kriss@bmi.niche.tohoku.ac.jp
Tetsu Tanaka
Affiliation:
Tohoku University, Japan; ttanaka@lbc.mech.tohoku.ac.jp
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Abstract

To overcome various concerns due to scaling-down device size in future large-scale integration (LSI), it is indispensable to introduce a new concept of heterogeneous three-dimensional (3D) integration in which various kinds of device chips with different sizes, devices, and materials are vertically stacked. To achieve such heterogeneous 3D integration, the key technology of self-assembly and electrostatic (SAE) bonding has been developed. The heterogeneous 3D integration technology with the SAE bonding method has enabled 3D heterogeneous stacking of different types of chips such as the compound semiconductor device chip, photonic device chip, and spintronic device chip on complementary metal oxide semiconductor chips. A 3D image sensor with extremely fast processing speed and a 3D microprocessor with a self-test and self-repair function for future automatic driving vehicles are typical examples of heterogeneous 3D LSIs which we fabricated by the SAE bonding method.

Keywords

Self-assemblybondingpolymerreactive ion etchingsputtering

Information

Type
Research Article
Information
MRS Bulletin , Volume 40 , Issue 3: Materials challenges in 3D IC technology , March 2015 , pp. 242 - 247
Copyright
Copyright © Materials Research Society 2015 

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